Description

• Parameters: LOW-POWER 2-INPUT OR-GATE
• Description: The SLP74AUP1G32 is a single 2-input OR gate. This device is fully specified for partial power down applications using I circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Download the latest English version SLP74AUP1G32 SLP74AUP1G32 Brief Datasheet
• Features: Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial power-down mode operation Latch-up performance : 100mA Low static power consumption; ICC = 0.9 µA (maximum) ESD protection: HBM : 2000V • Applications: General Purpose