Description

• Parameters: LOW-POWER 2-INPUT AND-GATE
• Description: The SLP74AUP1G08 is a single 2-input AND gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using I circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Download the latest English version
• Features: Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of VCC I OFF circuitry provides partial Power-down mode operation Latch-up performance : 100 mA Low static power consumption; ICC = 0.9 μA (maximum) • Applications: General Purpose